SoC for Security

In this project, our team is working on designing a SoC with cryptographic accelerators. Our goal is to create a system-level model of it integrated with a RISC-V processor. Following this, we will develop the RTL design and proceed to prototyping. 

It contains:

RISC-V processor

RSA

AES

CRC

UART

Timer

OS

PLL

Regulator

I am one of the project leaders, working under the guidance of Dr. Navabi and Dr. Safari. Our team comprises eight undergraduate students and two graduate students. Many of these students will be able to utilize this research for their academic projects.